In Hexagon V60 HVX Programmer’s Reference Manual, there are following lines. But which functions should be called to do the setting up?
A minimal “uni-HVX” implementation would support the following vector context
configurations:
■ One context of double-sized 1024-bit vectors
■ Two contexts of 512-bit vectors
A higher-tier implementation can have more vector contexts. For example, a “dual-HVX”
system would support the following vector context configurations:
■ Two contexts of double-sized 1024-bit vectors
■ Four contexts or 512-bit vectors
The Hexagon scalar core can contain any number of hardware threads greater than or
equal to the number of vector contexts. The scalar hardware thread is assignable to a
vector context through per-thread SSR:XA programming, as follows:
■ SSR:XA=4: HVX instructions use vector context 0
■ SSR:XA=5: HVX instructions use vector context 1
■ SSR:XA=6: HVX instructions use vector context 2
■ SSR:XA=7: HVX instructions use vector context 3
All other values of XA produce undefined results.
Management of this is under control of the RTOS on the Hexagon. For the Hexagon SDK development environment, simplest way is to use the dspCV wrapper. This includes dspCV_hvx_lock, which accepts a mode (512-bit or 1024-bit) as one of its arguments.
In the Hexagon SDK documentation, look at Examples->Computer Vision->downscaleBy2 for a walkthrough of how to do this.
Michael