I am using the QCA4020's SPI master to communicate to a device that has a maximum SCLK frequency of 2MHz. I'd like to operate the QCA4020's SPI master's SCLK at 500KHz or 1MHz. I have the SPI master working and can see the SCLK and MOSI data on my logic analyzer, however, it seems I cannot reduce the SPI's SCLK frequency to an acceptable value. If I set qapi_SPIM_Config_t's max_Slave_Freq_Hz to 100,000 it outputs at 50MHz. If I set it to 20M I see 16.67MHz.
I assume 500KHz is too low and is simply not being recognized as a valid max_Slave_Freq_Hz. Is it possible to reduce the QCA4020's SPI master's SCLK to a value less than 2MHz? Is there a divider I can adjust somewhere?