Qualcomm's Hexagon DSP uses a multi threaded 32 bit architecture, with barrel temporal multithreading. I'm trying to understand the motivation behind this architecture.
1. Compared to a multicore DSP, there is power saving in this architecture as far as I have read. But it is mostly my inference, is this correct?
2. What might be the advantage of such an architecture apart from power savings, compared to a multicore DSP?
3. A single core multithreaded architecture means shared resources, if I'm not mistaken. Shared resources mean competition for the same. How is this taken care of in this architecture?
What is the advantage of Qualcomm Hexagon's multi threaded microarchitecture
Posted: Thu, 2018-01-04 05:12