Forums - CAPIv2 interface - Intermodule communication

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CAPIv2 interface - Intermodule communication
Join Date: 4 Oct 17
Posts: 1
Posted: Tue, 2019-12-03 09:13


I'm trying to understand the CAPIv2 interface - Intermodule communication, in particular how to exchange the data buffer from TX and RX module. I tried to use the capi_v2_sp, but there is not enough documentation.

I need to pass the TX samples to the RX module, in order to process together RX and TX data: is it possible?

Is there some detailed documentations that explain the  capi_v2_sp example?

Thanks in advance.

Best regards

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