QCA4004 Module not giving WMI_READY interrupt
Posted: Wed, 2015-05-06 04:48
We are using Longsys GT1216 WIFI module in which QUALCOMM QCA4004 module is embedded in our board for SMART communication.Wifi module is controlled by SPI interface with STM32F107Rb controller.
Through UART able to communicate with WIFI module and to configure it for transmission and reception of TCP packets to and from systems connected with same access point connected to WIFI module. Here WIFI module is set to USB/manufacturing test and configuration mode by default as HM [1:0] pin is set as [0:0] as mentioned in GT1216 Datasheet V1.3.
Through SPI able to read and write SPI external registers ,verified the default values provided in QCA4002/QCA4004 Hosted SDK (MQX1.1) Programmer’s Guide.In the Boot process hi_refclk_hz is read and verified as 40 MHZ.After this it is writing four-byte 0x00000002 to HOST_INTEREST_ITEM_ADDRESS(hi_flash_is_present) for WIFI module to continue booting from serial flash.
Then ATH_SPI_INTR_ENABLE_REG is enabled in HTC_Start() function.Next we are expecting first packet interrupt WMI_READY_EVENT message from WIFI module.But not getting any interrupt.When probed interrupt pin it remains in HIGH state all the time.
We additionally enabled the host control write done interrupt in INTR_ENABLE register in the source provided and got Interrupt from WIFI module when a writes to an external register comes in source code(HIGH to LOW signal found in Osciloscope when probed).
Below are the procedures done for establishing SPI connection with WIFI module.
1)Changed bootstrap configuration to SPI Host mode by pulling the HM [1:0] pin of WIFI module to [1:0] as said in GT1216 Datasheet V1.3.
2)Ported IoE Wi-Fi QCA4004 Platform Dev Kit SP140/144 (v3.3.2) source code provided by QUALCOMM to STM32F107Rb controller.
3)Enabled IP stack offload Macro defined in A_config.h.
Any Help will be appreciated in diagnosing the problem of not getting any WMI_READY_EVENT interrupt from WIFI module after succeding every step in the boot proccess.